The engineer's hub for High Density Interconnect printed circuit boards. Explore HDI stackup types, model microvia aspect ratios, learn design rules, the manufacturing flow, and what really drives cost — then build your HDI PCB with a proven fab.
An HDI PCB (High Density Interconnect) packs more interconnects into less area than a conventional board. It does this with laser-drilled microvias, very fine lines and spaces, blind and buried vias, and thin dielectrics — letting designers escape fine-pitch BGAs and shrink products without losing routing channels.
Tiny ≤150 µm vias connect adjacent layers. Copper-filled so they can be stacked or placed in-pad under a BGA.
Trace/space down to ~40 µm enables dense escape routing and high pin-count packages on a small footprint.
Layers are laminated and drilled in stages (SBU). Each HDI level adds a lamination cycle — and capability.
Shorter via stubs, thinner dielectrics and controlled impedance improve high-speed and RF performance.
HDI build-ups are named x + N + x, where N is the conventional through-via core and x is the number of microvia build-up layers added to each side. Select a structure to see its characteristics — and a live cross-section diagram.
A real sequential build-up stackup interleaves copper foil, prepreg and cores, then ties layers together with microvias, buried vias and plated through-holes. Here is what each element does.
Outer and build-up conductors (often ½–1 oz). Patterned by laser-direct imaging into fine traces and BGA pads.
Resin-impregnated glass that bonds layers during lamination. Thin prepregs keep microvia depth low for a good aspect ratio.
Cured, copper-clad laminate that forms the rigid centre. The conventional "N" through-via section is built on cores.
Laser microvias join adjacent layers; buried vias link inner layers; plated through-holes span the board for power and mounting.
Liquid photo-imageable (LPI) mask protects copper; the legend/ident layer carries reference designators.
Sanity-check your design before you release it. These tools follow common IPC-2226 / fab DFM guidance — adjust the inputs and read the verdict in real time.
Microvia aspect ratio = depth ÷ top diameter. Industry practice targets ≤ 0.75:1 for high reliability, with up to 1:1 achievable. Above ~1:1 needs advanced fill/plating; above 1.5:1 is generally not recommended for stacked, copper-filled microvias.
Through-hole / board aspect ratio = board thickness ÷ finished hole diameter. ≤ 8:1 is standard for reliable plating; 8–10:1 is offered by advanced HDI fabs; 10–12:1 is specialised; beyond 12:1 very few fabs can plate reliably.
Indicative only — a relative complexity index, not a quote. Real pricing depends on materials, finish, tooling, yield and current capacity. Get a real HDI PCB quote →
Typical standard vs advanced HDI capabilities. Always confirm against your fab's live DFM.
| Parameter | Standard HDI | Advanced HDI |
|---|---|---|
| Min trace / space | 75 / 75 µm (3/3 mil) | 40 / 40 µm (1.6/1.6 mil) |
| Min laser microvia ⌀ | 100 µm | 50–75 µm |
| Microvia capture pad ⌀ | 250 µm | 150–180 µm |
| Microvia aspect ratio | 0.75 : 1 | 1 : 1 |
| Min mechanical drill | 200 µm | 100–150 µm |
| Through-hole aspect ratio | 8 : 1 | 10–12 : 1 |
| HDI build-up levels | 1–2 (1+N+1, 2+N+2) | 3+ & Any-Layer |
| Layer count | up to ~12 | 16–24+ |
Practical rules that keep HDI boards manufacturable, reliable and cost-effective.
Keep microvias ≤ 0.75–1:1 by pairing each laser via with a thin enough prepreg. High aspect ratios cause plating voids and reliability fails.
Staggered microvias are more robust than stacked. Stack only where density demands it, and require copper-filled, capped vias when you do.
Balance copper and dielectric about the centre line. Asymmetric build-ups warp during lamination and reflow.
Lock controlled-impedance targets and trace geometry with your fab up front — the stackup, not the schematic, sets the dielectric heights.
Use via-in-pad (filled & capped) for fine-pitch BGAs; dog-bone fanout only where pitch allows. Match microvia pad to package land.
Each HDI level = another lamination + drill + plate cycle. Use the fewest levels that route the design to control cost and yield.
HDI is built outward from the core in sequential lamination cycles. A simplified flow for a 2+N+2 board:
Image, etch and AOI the inner cores that form the conventional "N" section, then drill & plate any buried vias.
Press the next build-up layer (prepreg + copper foil) onto the sub-assembly under heat and pressure.
UV/CO₂ lasers ablate microvias to the target layer — controlled depth keeps the aspect ratio in spec.
Clean the vias, then electroless + electroplate copper, filling microvias so they can be stacked or used in-pad.
Laser-direct imaging defines fine traces and pads; repeat lamination → laser → plate → image for each HDI level.
Mechanically drill any remaining PTHs, then plate to interconnect the full board for power and mounting.
Apply LPI solder mask and legend, then a surface finish — ENIG / ENEPIG for fine-pitch, OSP for cost.
Profile to shape and 100% flying-probe / fixture test for opens & shorts before shipment.
HDI costs more than standard multilayer because each level adds process steps. These are the biggest levers — model them with the cost index above.
Every HDI level (1+N+1 → 2+N+2 → 3+N+3) adds a press, drill, plate & image cycle. The single biggest cost driver.
More layers mean more material, processing and yield risk. Cost scales steeply above ~12 layers.
Laser drill time and fill plating scale with via count; stacked/filled vias cost more than staggered.
Low-loss / high-Tg / RF laminates carry a premium over standard FR-4 for high-speed designs.
ENEPIG > ENIG > immersion > OSP in cost. Fine-pitch and reliability needs often dictate the choice.
Tooling and setup amortise over volume; tight aspect ratios and fine features lower yield and raise unit price.
Wherever size, weight, pin-count or speed is critical, HDI is the enabling technology.
Any-layer HDI mainboards pack SoCs, RF and memory into millimetres of thickness.
Tiny rigid & rigid-flex HDI boards for watches, earbuds and health trackers.
Imaging, monitoring and implantable electronics where density and reliability are paramount.
Radar, cameras and ECUs demanding fine-pitch, high-speed routing in harsh environments.
Lightweight, high-reliability avionics, sensors and communications hardware.
Compact, integrated antenna and radio modules with controlled impedance.
High layer-count HDI for processors, accelerators and high-speed backplanes.
Routers, switches and optical modules routing dozens of high-speed lanes.
From 1+N+1 to any-layer ELIC, PCBSync builds production-grade HDI boards with laser microvias, controlled impedance and full DFM support. Move from stackup to shipped board with one partner.
An HDI (High Density Interconnect) PCB is a board with higher wiring density per unit area than conventional PCBs. It uses laser-drilled microvias, fine lines and spaces, blind and buried vias, and thin dielectrics to pack more interconnects into less space — enabling fine-pitch BGAs and smaller, faster, lighter products.
A microvia is a small laser-drilled via, typically 150 µm in diameter or less, connecting two adjacent copper layers in an HDI build-up. Microvias are usually copper-filled so they can be stacked vertically or placed directly in a pad (via-in-pad) under a BGA.
The notation describes the build-up. "N" is the conventional through-via core (its layer count), and the leading and trailing numbers are the microvia build-up layers added to each side. 1+N+1 adds one HDI layer per side; 2+N+2 adds two; 3+N+3 adds three. Each extra level requires another sequential lamination cycle.
Any-layer HDI — also called ELIC (Every Layer Interconnect) — uses copper-filled, stacked microvias between every adjacent layer, with no mechanically drilled through holes in the signal area. It offers the highest routing density and is common in flagship smartphones and advanced modules.
Standard HDI routinely reaches about 75/75 µm (3/3 mil) trace and space, while advanced HDI fabs can achieve roughly 40/40 µm (1.6/1.6 mil) or finer using (modified) semi-additive processing.
It depends on layer count, the number of lamination cycles (HDI levels), microvia count, materials, surface finish, size and quantity. As a rough relative index, HDI often runs two to four times a comparable standard multilayer board at volume, with prototypes higher. Use the cost-index tool above for an indicative figure, then request a real quote.
A through via passes through the whole board. A blind via connects an outer layer to one or more inner layers but doesn't go all the way through. A buried via connects only inner layers and isn't visible from either surface. HDI designs combine microvias with buried and through vias to maximise density.
